Semiconductor fabrication comprises many discrete processes to create the desired features or devices. Some of these processes include lithography, etching, deposition and ion implantation.
Often, in the case of etching, a material, also referred to as a mask or hard mask, is disposed on the surface to be etched. Portions of the hard mask are removed, creating openings that expose some material or the underlying workpiece. The opening in the hard mask after this process is referred to as the critical dimension (CD). There is an inherent CD variation across several similar structures, both within a die and across the workpiece. CD variability impacts circuit performance and reduction of this variability is beneficial.
The exposed material or underlying workpiece is then treated with an etching process, which removes the exposed material or underlying workpiece.
This etching process functions due to the difference in etch rate between the hard mask and etch rate of the underlying material or workpiece. In other words, the etching process removes the material or underlying workpiece at a faster rate than it removes the hard mask. In this way, the exposed material or workpiece is etched, while the hard mask protects other portions of the workpiece.
However, as semiconductor fabrication processes continue to evolve, the initial openings in the hard mask prior to the etching process are becoming narrower. A narrower opening implies that either a longer or more aggressive etching process is performed to remove the desired amount of material or underlying workpiece.
This longer or more aggressive etching process may remove material from the hard mask and/or modify the hard mask shape. If too much of the hard mask is removed, the hard mask will no longer be able to protect the rest of the workpiece from the etching process. If the hard mask shape is modified during the etch process, the resulting CD may be different from the intended value. This effect creates an inherent CD variation across the die and workpiece. To compensate for this more aggressive etching process, the hard mask may be made thicker, to account for the removal of the hard mask by the etching process. In another embodiment, a different type of material, which is more resistant to etching, may be used for the hard mask.
However, these changes may cause modifications to the semiconductor fabrication process, which may be expensive or difficult to implement or may result in increased CD variation. Therefore, it would be advantageous if there was a method to modulate the etch resistance of the hard mask and other materials to allow currently used materials to continue to be exploited. Further, it would be beneficial if this method did not affect the overall throughput of the semiconductor fabrication process.